Using the start and end address of the RAM and ROM in FMP9, construct a RAM and ROM addresses decoder. Assume the following:RAM chip used: 6264ROM chip used: 27128Note: Construct only the address decoder circuit.

To construct a RAM and ROM address decoder for FMP9, we need to know the start and end addresses of the RAM and ROM. However, since you didn't provide these, I'll assume some typical values for the purpose of this explanation.

Let's assume the following:

• RAM (6264) start address: 0x2000, end address: 0x3FFF
• ROM (27128) start address: 0x8000, end address: 0xFFFF

Step 1: Identify the Address Lines The 6264 RAM chip has 13 address lines (A0-A12), and the 27128 ROM chip has 14 address lines (A0-A13).

Step 2: Construct the RAM Decoder The RAM is mapped from 0x2000 to 0x3FFF. This means that the upper 3 bits of the address (A15, A14, A13) should be 001. We can use a 3-to-8 line decoder (like the 74LS138) for this. Connect A15 to the first input, A14 to the second input, and A13 to the third input. The output line 1 (which corresponds to 001) will be active when the address is in the range 0x2000 to 0x3FFF. This output can be used as the chip select (CS) signal for the RAM.

Step 3: Construct the ROM Decoder The ROM is mapped from 0x8000 to 0xFFFF. This means that the uppermost bit of the address (A15) should be 1. We can use a 1-to-2 line decoder (like the 74LS139) for this. Connect A15 to the input. The output line 1 (which corresponds to 1) will be active when the address is in the range 0x8000 to 0xFFFF. This output can be used as the chip select (CS) signal for the ROM.

Note: This is a simplified explanation and assumes that the RAM and ROM chips are only enabled by the address. In a real system, other signals (like the read/write signals) would also be involved in the chip select logic.