The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?
Question
The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?
Solution
The bit sequence 10011100 is entered into the shift register from right to left, so after reversing the sequence, we get 00111001.
After four clock pulses, the four right-most bits (0011) will have been entered into the shift register. The remaining bits in the register will still be clear (0), as they have not yet been filled.
So, the Q outputs of the shift register after four clock pulses will be 00110000.
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