An acceptable voltage range of a logic 0 for TTL

What is the typical output voltage of an AND gate when both inputs are LOW (0) in a standard TTL logic family?Approximately equal to the supply voltageVariable, depending on the gate configurationClose to 0 voltsAround 1 volt

In TTL family HIGH output corresponds to

Digital logic gates operate at a single voltage level.Group of answer choicesTrueFalse

The AND is the simplest of the gates, requiring the least amount of circuitry to implement TTL1 pointTrueFalse

When an input to the TTL logic tutor is left disconnected, how does it behave?Question 3Answera.It behaves like a logic 0b.It does not have any effect on the circuitc.None of the other optionsd.It behaves like a logic 1