Ques 1: The number of output ports in the peripheral mapped I/O is restricted to 256 ports because the address bus of the 8085 microprocessor is 8-bit. This means it can only address 2^8 = 256 different locations.

Ques 2: Yes, in the peripheral mapped I/O, an input and an output port can have the same address. This is because the 8085 microprocessor uses different control signals for input and output operations.

Ques 3: The 8085 microprocessor can differentiate between the ports by using different control signals for input and output operations. For output, it uses the Write signal, and for input, it uses the Read signal.

Ques 4: The two 8085 signals that are used to latch data in an output port are the Address Latch Enable (ALE) and Write (WR) signals.

Ques 5: The two types of pulse required to latch data in the 7475 are the clock pulse and the data pulse.

Ques 6: Data are latched in 7475 at the leading edge of the enable signal.

Ques 7: The 8085 signals that are used to enable an input port are the Address Latch Enable (ALE) and Read (RD) signals.

Ques 8: A latch is used for an output port to hold the data until it is ready to be sent out. A tri-state buffer can be used for an input port because it allows the port to be in one of three states: outputting a '0', outputting a '1', or in a high impedance state where it does not affect the rest of the circuit.

Ques 9: The control signals necessary in the memory mapped I/O are the Memory Read (MEMR) and Memory Write (MEMW) signals.

Ques 10: The microprocessor cannot differentiate whether it is reading from a memory mapped input port or from memory. This is because the same address space is shared by both memory and I/O devices in memory mapped I/O.

Question

Ques 1: The number of output ports in the peripheral mapped I/O is restricted to 256 ports because the address bus of the 8085 microprocessor is 8-bit. This means it can only address 2^8 = 256 different locations.

Ques 2: Yes, in the peripheral mapped I/O, an input and an output port can have the same address. This is because the 8085 microprocessor uses different control signals for input and output operations.

Ques 3: The 8085 microprocessor can differentiate between the ports by using different control signals for input and output operations. For output, it uses the Write signal, and for input, it uses the Read signal.

Ques 4: The two 8085 signals that are used to latch data in an output port are the Address Latch Enable (ALE) and Write (WR) signals.

Ques 5: The two types of pulse required to latch data in the 7475 are the clock pulse and the data pulse.

Ques 6: Data are latched in 7475 at the leading edge of the enable signal.

Ques 7: The 8085 signals that are used to enable an input port are the Address Latch Enable (ALE) and Read (RD) signals.

Ques 8: A latch is used for an output port to hold the data until it is ready to be sent out. A tri-state buffer can be used for an input port because it allows the port to be in one of three states: outputting a '0', outputting a '1', or in a high impedance state where it does not affect the rest of the circuit.

Ques 9: The control signals necessary in the memory mapped I/O are the Memory Read (MEMR) and Memory Write (MEMW) signals.

Ques 10: The microprocessor cannot differentiate whether it is reading from a memory mapped input port or from memory. This is because the same address space is shared by both memory and I/O devices in memory mapped I/O.

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